1. Field of the Invention
The present invention generally relates to a ceramic capacitor, and more specifically relates to a ceramic capacitor with low capacitance that is improved so that mass production of the same can be accomplished with excellent reproducibility and with uniform properties. The present invention also relates to a method for producing a ceramic capacitor with low capacitance that is improved so as to increase the yield. The present invention further relates to a dielectric multilayer device using such a ceramic capacitor that is improved so as to stabilize the frequency characteristics.
2. Related Background Art
Conventionally, ceramic capacitors and dielectric multilayer devices using the same have been used mainly for communication equipment. FIG. 16 is a block diagram of communication equipment including a dielectric multilayer device such as a filter therein, which shows a mobile phone, for example. The mobile phone is equipped with a transmitter 100, a receiver 101, a base band unit 11, a branching filter 2, a radiator 6 and an antenna 1. The transmitter 100 includes a frequency conversion unit 5, a filter 4 and a transmission amplifier 3. The receiver 101 includes a reception amplifier 7, a filter 8, a frequency conversion unit 9 and a filter 10. The branching filter 2, or the filters 4, 8 or 10 may be individually constituted as an independent multilayer dielectric device, or may be provided integrally within the transmitter 100 or the receiver 101. As the filters 4, 8, and 10 and a filter built into the branching filter 2, a low pass filter, a high pass filter, a band pass filter, a band elimination filter and the like are used. These filters are used for allowing signals within a predetermined frequency band to pass through or to be attenuated.
FIG. 17 shows an equivalent circuit diagram showing one example of a low pass filter. The low pass filter includes an inductor 15 and capacitors 12, 13 and 14.
FIG. 18 schematically shows a method for producing the above-stated low pass filter by a sheet lamination method. Green sheets 16 to 21 provided with conductive patterns 22 to 27, respectively, are prepared, where the green sheet is a dielectric raw material sheet made of ceramic containing a binder. These sheets are aligned using alignment marks 110 and are laminated, followed by sintering so as to obtain the low pass filter. Not only the low pass filter but any filters are made up of some capacitors as shown in FIG. 17. Frequency characteristics of a filter are determined by the capacitance values of these capacitors.
FIG. 19 schematically explains a first conventional technology (See JP 60(1985)-89912 A (page 5, FIG. 4), for example) in which a capacitor is formed by the sheet lamination method. For the sake of clarity, a green sheet serving as a dielectric layer is not illustrated in these drawings. As shown in FIG. 19A, assuming that an area of a second conductive pattern 28 serving as an upper electrode is S0, an interval between the upper electrode 28 and a first conductive pattern 29 serving as a lower electrode is d and a dielectric constant of the not-illustrated dielectric layer is ∈, the capacitance C0 is represented by the following formula (1):C0=∈×(S0/d)  (formula 1)
As shown in FIG. 19B, in the conventional technology, the area S0 of the second conductive pattern 28 and the area of the first conductive pattern 29 are made different to take into account possible displacement in lamination of the green sheets. That is to say, in the projection in a thickness direction of the dielectric layer (not illustrated), intervals L1, L2, L3 and L4 are provided between an outer edge of the second conductive pattern 28 and an outer edge of the first conductive pattern 29 as shown in the drawing.
Such provision of a difference in area between opposed electrodes of a capacitor is disclosed in other patent literature also (See JP 2002-222730 A (page 4, FIG. 3), for example).
As shown in FIG. 19C, a lead 30 is attached to the second conductive pattern 28 for the connection with another circuit (not illustrated). Since the lead 30 is a conductor, the first conductive pattern 29 and a portion 30a of the lead 30 that overlaps the first conductive pattern 29 forms capacitance C1. In this case, the overall capacitance of the capacitor will be given by the following formula 2:C=C0+C1  (formula 2)
The capacitor according to the first conventional example is formed as stated above. This configuration does not pose any problems if an area S1 of the overlapping portion 30a of the lead 30 and the first conductive pattern 29 is constant.
However, due to the displacement during the lamination of green sheets, there may be a case, as shown in FIG. 20A, where the second conductive pattern 28 is displaced toward the left side in the drawing so as to increase the area of the overlapping portion 30a or conversely there may be another case, as shown in FIG. 20B, where the second conductive pattern 28 is displaced toward the right side in the drawing so as to decrease the area of the overlapping portion 30a. Even if the accuracy in alignment during the lamination is improved, it is impossible to make the displacement in lamination zero. Such displacement causes a fluctuation in the capacitance C1, which generates a variation in the capacitance C. Moreover, such variation in the capacitance C of the capacitor leads to the failure in mass production of capacitors with uniform capacitance, thus degrading the yield. Such a problem is generated also in the case where the second conductive pattern 28 is displaced in the θ rotational direction (rotational displacement in a horizontal plane) during the lamination of sheets.
The above-stated variation poses a serious problem especially when a miniaturized and low-capacitance capacitor is produced, where the areas of the second conductive pattern 28 and the first conductive pattern 29 are reduced as shown in FIG. 21A. That is to say, in the case of a small area S0, the fluctuation in the area of the overlapping portion 30a has a great influence on the capacitance value C of the capacitor.
Then, in a second conventional example, as shown in FIG. 21B, an area of a second conductive pattern 28 is increased (e.g., to twice) and a distance between the second conductive pattern 28 and a first conductive pattern 29 is increased (e.g., to twice) in order to reduce a variation in capacitance value due to the displacement in lamination of green sheets in a low-capacitance capacitor that is formed in a dielectric multilayer device. With this configuration, an area of the capacitance formation portion of a main body is increased, and therefore a capacitance value C0 of the capacitance formation portion of the main body is increased. Consequently, even if the green sheets are displaced during the lamination, capacitance C1 of an overlapping portion of a lead portion 30 and the first conductive pattern 29 becomes smaller relative to the capacitance value C0 of the capacitance formation portion of the main body, so that a variation in the capacitance C1 can be ignored. As a result, even if the green sheets are displaced during the lamination, a variation in the capacitance value C of the capacitor can be ignored.
However, according to the second conventional method, the area of the second conductive pattern 28 is increased, and the distance between the second conductive pattern 28 and the first conductive pattern 29 is increased, so that this method poses a problem for miniaturization of the element.
In order to make a dielectric multilayer device smaller and thinner, elements formed on each circuit should be formed as compact as possible. On the other hand, as long as the sheet lamination method is employed, displacement of green sheets is inevitable during the lamination. Therefore, according to the above-stated two conventional methods, there is a limit in miniaturization when a low-capacitance capacitor is formed by the sheet lamination method.